This application claims the priority benefit of Taiwan application serial no. 90117180, filed Jul. 13, 2001.
1. Field of the Invention
The invention relates in general to a method to compensate a threshold voltage of a neighbor bit while programming on a memory cell of a flash memory. More particularly, the invention relates to a method to compensate a threshold voltage of a neighbor bit while programming on a memory cell of a trapping device.
2. Description of the Related Art
In general, a flash memory is provided with plenty of memory cells for saving data. FIG. 1 shows a conventional memory cell device including a floating gate transistor in a flash memory. The floating gate transistor comprises a floating gate 100 in a floating state for storing an electric charge used for saving data.
However, only one bit of data can be written into the memory cell while programming thereon.
An Israelite Saifun proposed a NROM memory cell device, a kind of trapping device, as shown in FIG. 2 to resolve the above problem. The feature of the memory cell device is that it has two bits, a bit 106 and a bit 108, for saving two bits of data wherein each of the bits can store a bit of data. However, the electric charges of the neighbor bit can affect each other. In other words, if the bit 106 is previously programmed in a state of a high threshold voltage, the speed of programming the bit 108 will slow down.
Accordingly, this invention provides a method for compensating threshold voltages of neighbor bits to prevent the electric charges of the two bits in the trapping device from interacting while programming the two bits. In addition, the electric charges of the two bits can also be attracted relatively fast to shorten programming time.
A method for compensating a threshold voltage of a neighbor bit comprising the first step of arbitrating the word line voltages applied to the bits which are to be programmed, for instance, the memory cells of trapping devices. The word line voltages are arbitrated according to the threshold voltages of the neighbor bits adjacent to the bits, which are being programmed.
The sequent step is applying a word line voltage, a value which is obtained by the result of the above-mentioned arbitration, to the bits to simultaneously program the bits.
However, during the operation of a low supply-source voltage, the charge pumping circuits cannot supply enough energy to the memory cells for programming them at the same time.
Accordingly, this invention further provides a method for compensating a threshold voltage of a neighbor bit. The method includes clustering bits, to which a same word line voltage is applied, so that the charge pumping circuits can provide enough energy to program the clustered bits at the same time. Wherein, a flash memory comprises a plurality of trapping devices. Each trapping device has two bits, and each bit can store a bit of data. The so-called trapping devices are the above-mentioned memory cells.
The method for compensating a threshold voltage of a neighbor bit comprises the first step of arbitrating word line voltages applied to bits, which are to be programmed in the memory cells. The word line voltages are arbitrated according to the threshold voltages of the neighbor bits adjacent to the bits which are to be programmed.
The subsequent step is distributing the bits, to which a first word line voltage should be applied, to a first group of the same word line voltage. Next, the first word line voltage is applied to the bits of the first group of the same word line voltage in accordance with the distributing result.
Afterwards, the bits, to which a second word line voltage should be applied, are distributed to a second group of bits with the same word line voltage. Next, the second word line voltage is applied to the second group of bits with the same word line voltage in accordance with the distributing result.
The invention further provides a buffer for compensating a threshold voltage of a neighbor bit. A flash memory comprises a plurality of trapping devices and buffers. Each of the trapping devices corresponds to one of the buffers. Each trapping device has two bits, where each trapping device can store a bit of data. The buffers are connected to each other in series.
A latch register in the buffer is to temporarily store data of the bits, which are to be programmed. A reference signal register is to temporarily store a reference signal, wherein the value of the reference signal is determined by the word line voltage being applied, and the word line voltage, which is supposed to be applied to the bits. The word line voltage applied to the programmed bits is determined by the threshold voltage of the neighbor bit adjacent to the bits, which are to be programmed.
A NOR gate is coupled to the latch register and the reference signal register. The NOR gate judges the signals transmitted from the latch register to the reference signal register and then generates a control signal. The control signal is used to determine whether a bit line voltage is needed to be applied to the bits of the trapping devices.
The same word line voltage and the same bit line voltage are simultaneously applied to the bits in order to program the bits at a same time.
The buffer for compensating a threshold voltage of a neighbor bit of the invention further comprises an adder and a flip-flop.
The adder comprises a plurality of receiving terminals and output terminals. The receiving terminals receive the control signal transmitted from the NOR gate. The control signal acts as a counting basis of the adder. One of the receiving terminals receives a highest bit from an adder of a former buffer and the highest bit is transmitted to the NOR gate.
The flip-flop comprises a plurality of receiving terminals and output terminals. The receiving terminals receive the control signal from the NOR gate. The flip-flop outputs the control signal, and transmits a mark signal back to the NOR gate.
In conclusion, both the method and the buffer for compensating a threshold voltage of a neighbor bit of the invention are to apply different word line voltages according to different threshold voltages of the neighbor bits to the bits in the trapping devices. In addition, during the operation of a low supply-source voltage, the bits, to which a same word line voltage is applied, can be distributed to a same group so that charge pumping circuits can provide enough energy to program the clustered bits at a same time. As a result, charges can be attracted relatively fast and programming time can be cut down.
Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.